SATA-Connector Pinout

[cheerio]

I have a question regarding the SATA-Connector Pinout.
We got 4 data wires:
TX+ / TX-
RX+ / RX-

I want to connect those to a multiplexer and i am not sure which direction the Signals travel.
Is the RX / TX in the perspective of the HDD or the Controller?

[kam]

as far as i can remember, the first pair (A) is transmit from host to device and the second pair (B) is receive from device to host.

But ... hey... how are you going to multiplex these monsters? With which chip?

[cheerio]

i will use this one:
http://www.ti.com/product/ds100mb203
or this one:
http://www.ti.com/product/ds64mb201

I help a friend with his bachelor thesis. He is building a SATA swapper. You can attach 4 SATA HDDs to 2 SATA channels and shut all disks off if you do not need them. This is for a reduction in power, heat and !noise! emission.
Controlled by a software running on your pc. the command swill be send via usb to the swapper.

[kam]

turning off only the power is not enough??? why turn off the data ?

[cheerio]

the idea is to use it for storage data only. so you do not need all the hdds available simultanously. using 1 dedicated sata port for each hdd would be a waste of slots.

[kam]

aha! ok got it

[cheerio]

just a little follow up:
I have the board ready but i have some problems. Maybe i did not read the Datasheet right.
I use the Mikrocontroller(master) to read/write register values of the DS100MB201(slave). The slave does never pull the SDA line down. My best guess is, that the 3.3V i supplied to the SEL pins fried the chip. I checked the communication via a logic analyzer and the master behaves just like the datasheet description.

Maybe TI will give me some reply. For those interested: http://e2e.ti.com/support/interface/high_speed_interface/f/138/t/320085.aspx

attachments:
1. Schematic
2. Datasheet

[kam]

Just wondering, who will design the PCB for this babe? I mean, you really need to consider tons of high-speed staff like parasitic capacitance per se.

[cheerio]

i designed it. was a pain in the ass and i screwed up a few things. but it is just a proof of concept. TI has some nice app notes and stuff about high speed low voltage differential signal pcb layout. i think the 3gb/s sata will work. not sure about the 6gb/s though...
Right now i still try to get the smbus stuff working. i cut the sel traces and switched the chip with a new one. nothing changed... i really don't know whats going on here... EVERYTHING seems to be alright according to the datasheet, but the chip never ACKs anything...

[cheerio]

did a iic search... b2 responded
did a check on the ds100mb203 datasheet (http://www.ti.com/lit/ds/symlink/ds100mb203.pdf)
using this datasheet the chip seems to act like it should... i could do a TI rage right now

[kam]

when ready, do a performance test with and without the multiplexer on the HDD. I'm looking forward to see the results.

[cheerio]

you have to wait quite some time until i can provide this data. i make the hardware and some simple librarys. my friend will make the software and some tests. First with sata-usb bridges to protect the pc sata controller. only when all is good we will go for a direct connection. the ds100mb201 is rated for 10gb/s. our target hdds are sata 3gb/s. I guess the really interesting part would be to got for real 6gb/s hdds but those are too expensive right now.

i really hope i did not screw the lvds pcb layout :/

[cheerio]

did a iic search... b2 responded
did a check on the ds100mb203 datasheet (http://www.ti.com/lit/ds/symlink/ds100mb203.pdf)
using this datasheet the chip seems to act like it should... i could do a TI rage right now

I had a mislabeled bag. Those chips WERE 203 models... shame

[kam]

I had a mislabeled bag. Those chips WERE 203 models... shame

Well, it happens...