Home     Contact     Projects     Experiments     Circuits     Theory     BLOG     PIC Tutorials     Time for Science     RSS     Terms of services     Privacy policy  
 Home      Projects     Experiments     Circuits     Theory     BLOG     PIC Tutorials     Time for Science   

<< Back to INDEX

Building a CPLD based logic analyzer [Project]
posted January 22 2014 13:12.19 by spic0m

Alex from InsideGadgets has been working on a Building a CPLD Based Logic Analyser. In Part I of his post he details his build of a logic analyzer which saves the sample to external SRAM.

For this project Alex used the Altera MAXII EPM240 development board with an on board 20MHz oscillator. The coding was done in Verilog. Details including the code and schematic can be found on InsideGadgets.

[Via: DangerousPrototypes]    [Link: InsideGadgets]

You might also like...

A gigantic strand of dark matter observed in 3D [Space]

Albert Einstein's Theory of Relativity [Physics]

The Geek Picdump of the day #5 [5 Photos]

I Will Fix That! #11 [4 Photos]

NeoPixel Painter [Project]

How evolution shapes the geometries of life [Biology]

One Year Mosaic of Beijing Pollution Looks as Terrifying as it is

The Making of a Gaming Mouse: Inside Logitech's Labs [Technology]

<< Back to INDEX



  Email (shall not be published)


Notify me of new posts via email

Write your comments below:
BEFORE you post a comment:You are welcome to comment for corrections and suggestions on this page. But if you have questions please use the forum instead to post it. Thank you.


No comment yet...

Be the first to comment on this page!

 Contact     Forum     Projects     Experiments     Circuits     Theory     BLOG     PIC Tutorials     Time for Science     RSS   

Site design: Giorgos Lazaridis
© Copyright 2008
Please read the Terms of services and the Privacy policy