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CMOS 555 Timer - TS555 vs NE555 Power Consumption [Test]
posted March 12 2014 5:00.13 by spic0m




In this video Martin Lorton have a quick look at the power consumption of the CMOS version of the 555 timer (TS555) in comparison to the NE555.

The TS555 is a single CMOS timer which offers very low consumption (Icc(TYP) TS555 = 110ľA at VCC=+5V versus Icc(TYP) NE555 = 3mA) and high frequency ff(max.) TS555 = 2.7MHz versus f(max.) NE555 = 0.1 MHz)

Thus, either in Monostable or Astable mode, timing remains very accurate.

The TS555 provides reduced supply current spikes during output transitions, which enables the use of lower decoupling capacitors compared to those required by bipolar NE555.

Timing capacitors can also be minimized due to high input impedance (10^12):9.


Key Features Very low power consumption: 110 ľA typ at VCC = 5 V 90 ľa typ at VCC = 3 V High maximum astable frequency of 2.7 MHz Pin-to-pin functionally-compatible with bipolar NE555 Wide voltage range: +2 V to +16 V Supply current spikes reduced during output transitions High input impedance: 10^12 Output compatible with TTL, CMOS and logic MOS



[Link: mjlorton]
 
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