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74 Serie IC Pinouts

CD4000 Serie    74 Serie   Op amp   Opt

## 74673

16-bit 3-state universal shift register with storage register, reset and 16-bit rotate function.
```         +---+--+---+
/CE |1  +--+ 24| VCC
/CLK |2       23| P15
R//W S0 |3       22| P14
/RRST S1 |4       21| P13
L//S S2 |5       20| P12
D0/Q15 |6   74  19| P11
P0 |7  673  18| P10
P1 |8       17| P9
P2 |9       16| P8
P3 |10      15| P7
P4 |11      14| P6
GND |12      13| P5
+----------+

```

## 74674

16-bit 3-state universal shift register with 16-bit rotate function.
```        +---+--+---+         +---+---+---*----------------------------+
/CE |1  +--+ 24| VCC     |/CE| S1| S0| Function                   |
/CLK |2       23| P15     +===+===+===*============================+
R//W S0 |3       22| P14     | 1 | X | X | hold, P0..15=Z             |
|4       21| P13     | 0 | X | 0 | serial-in parallel out     |
L//S S1 |5       20| P12     | 0 | 0 | 1 | serial&parallel out rotate |
D0/Q15 |6   74  19| P11     | 0 | 1 | 1 | parallel load              |
P0 |7  674  18| P10     +---+---+---*----------------------------+
P1 |8       17| P9
P2 |9       16| P8
P3 |10      15| P7
P4 |11      14| P6
GND |12      13| P5
+----------+
```

## 74677

16-bit inverting address comparator with enable.
```
+---+--+---+
A1 |1  +--+ 24| VCC
A2 |2       23| /EN
A3 |3       22| Y
A4 |4       21| P3
A5 |5       20| P2
A6 |6   74  19| P1
A7 |7  677  18| P0
A8 |8       17| A16
A9 |9       16| A15
A10 |10      15| A14
A11 |11      14| A13
GND |12      13| A12
+----------+
```

## 74682

8-bit inverting magnitude comparator with integrated 100k pull-up resistors.
```     +---+--+---+
/A>B |1  +--+ 20| VCC
A0 |2       19| A=B
B0 |3       18| B7
A1 |4       17| A7
B1 |5   74  16| B6
A2 |6  682  15| A6
B2 |7       14| B5
A3 |8       13| A5
B3 |9       12| B4
GND |10      11| A4
+----------+
```

## 74684

8-bit inverting magnitude comparator.
```     +---+--+---+
/A>B |1  +--+ 20| VCC
A0 |2       19| A=B
B0 |3       18| B7
A1 |4       17| A7
B1 |5   74  16| B6
A2 |6  684  15| A6
B2 |7       14| B5
A3 |8       13| A5
B3 |9       12| B4
GND |10      11| A4
+----------+
```

## 74686

8-bit inverting magnitude comparator with enable.
```     +---+--+---+
/A>B |1  +--+ 24| VCC
/EN1 |2       23| /EN2
A0 |3       22| /A=B
B0 |4       21| B7
A1 |5       20| A7
B1 |6   74  19|
|7  686  18| B6
A2 |8       17| A6
B2 |9       16| B5
A3 |10      15| A5
B3 |11      14| B4
GND |12      13| A4
+----------+
```

## 74687

8-bit open-collector inverting magnitude comparator with enable.
```     +---+--+---+
/A>B |1  +--+ 24| VCC
/EN1 |2       23| /EN2
A0 |3       22| /A=B
B0 |4       21| B7
A1 |5       20| A7
B1 |6   74  19|
|7  687  18| B6
A2 |8       17| A6
B2 |9       16| B5
A3 |10      15| A5
B3 |11      14| B4
GND |12      13| A4
+----------+
```

## 74688

8-bit inverting identity comparator with enable.
```    +---+--+---+
/EN |1  +--+ 20| VCC
A0 |2       19| /A=B
B0 |3       18| B7
A1 |4       17| A7
B1 |5   74  16| B6
A2 |6  688  15| A6
B2 |7       14| B5
A3 |8       13| A5
B3 |9       12| B4
GND |10      11| A4
+----------+

```

## 74689

8-bit open-collector inverting identity comparator with enable.
```    +---+--+---+
/EN |1  +--+ 20| VCC
A0 |2       19| /A=B
B0 |3       18| B7
A1 |4       17| A7
B1 |5   74  16| B6
A2 |6  689  15| A6
B2 |7       14| B5
A3 |8       13| A5
B3 |9       12| B4
GND |10      11| A4
+----------+
```

## 74691

4-bit 3-state synchronous binary counter with output registers, asynchronous reset and ripple carry output. Multiplexed register/counter outputs.
```      +---+--+---+
/CRST |1  +--+ 20| VCC
CCLK |2       19| RCO
P0 |3       18| Q0
P1 |4       17| Q1
P2 |5   74  16| Q2
P3 |6  691  15| Q3
ENP |7       14| ENT
RCLK |9       12| /OE
GND |10      11| R//C
+----------+

```

## 74697

4-bit 3-state synchronous binary up/down counter with output registers, asynchronous reset and ripple carry output. Multiplexed register/counter outputs.
```      +---+--+---+
U//D |1  +--+ 20| VCC
CCLK |2       19| RCO
P0 |3       18| Q0
P1 |4       17| Q1
P2 |5   74  16| Q2
P3 |6  697  15| Q3
ENP |7       14| ENT
RCLK |9       12| /OE
GND |10      11| R//C
+----------+
```

## 74699

4-bit 3-state synchronous binary up/down counter with output registers, reset and ripple carry output. Multiplexed register/counter outputs.
```      +---+--+---+
U//D |1  +--+ 20| VCC
CCLK |2       19| RCO
P0 |3       18| Q0
P1 |4       17| Q1
P2 |5   74  16| Q2
P3 |6  699  15| Q3
ENP |7       14| ENT
RCLK |9       12| /OE
GND |10      11| R//C
+----------+

```

## 74757

Dual 4-bit open-collector noninverting buffer/line driver.
One active low, one active high output enable.
```     +---+--+---+
/1OE |1  +--+ 20| VCC
1A4 |2       19| 2OE
2Y1 |3       18| 1Y1
1A3 |4       17| 2A4
2Y2 |5  74   16| 1Y2
1A2 |6  757  15| 2A3
2Y3 |7       14| 1Y3
1A1 |8       13| 2A2
2Y4 |9       12| 1Y4
GND |10      11| 2A1
+----------+

```

## 74758

4-bit open-collector inverting bus transceiver.
Two enable pins control output enables, one active high and one active low.
```     +---+--+---+
/GAB |1  +--+ 14| VCC
|2       13| GBA
A1 |3  74   12|
A2 |4  758  11| B1
A3 |5       10| B2
A4 |6        9| B3
GND |7        8| B4
+----------+
```

## 74760

Dual 4-bit open-collector noninverting buffer/line driver.
```     +---+--+---+
/1OE |1  +--+ 20| VCC
1A1 |2       19| /2OE
2Y4 |3       18| 1Y1
1A2 |4       17| 2A4
2Y3 |5  74   16| 1Y2
1A3 |6  760  15| 2A3
2Y2 |7       14| 1Y3
1A4 |8       13| 2A2
2Y1 |9       12| 1Y4
GND |10      11| 2A1
+----------+
```

## 74805

Hex 2-input NOR gates/line drivers.
```    +---+--+---+             +---+---*---+           ___
1A |1  +--+ 20| VCC         | A | B |/Y |      /Y = A+B
1B |2       19| 6B          +===+===*===+
/1Y |3       18| 6A          | 0 | 0 | 1 |
2A |4       17| /6Y         | 0 | 1 | 0 |
2B |5   74  16| 5B          | 1 | 0 | 0 |
/2Y |6  805  15| 5A          | 1 | 1 | 0 |
3A |7       14| /5Y         +---+---*---+
3B |8       13| 4B
/3Y |9       12| 4A
GND |10      11| /4Y
+----------+
```

## 74808

Hex 2-input AND gates/line drivers.
```    +---+--+---+             +---+---*---+
1A |1  +--+ 20| VCC         | A | B | Y |       Y = AB
1B |2       19| 6B          +===+===*===+
1Y |3       18| 6A          | 0 | 0 | 0 |
2A |4       17| 6Y          | 0 | 1 | 0 |
2B |5   74  16| 5B          | 1 | 0 | 0 |
2Y |6  808  15| 5A          | 1 | 1 | 1 |
3A |7       14| 5Y          +---+---*---+
3B |8       13| 4B
3Y |9       12| 4A
GND |10      11| 4Y
+----------+
```

## 74821

10-bit 3-state D flip-flop/bus driver.
```    +---+--+---+             +---+---+---*---+
/OE |1  +--+ 24| VCC         |/OE|CLK| D | Q |
D1 |2       23| Q1          +===+===+===*===+
D2 |3       22| Q2          | 1 | X | X | Z |
D3 |4       21| Q3          | 0 | / | 0 | 0 |
D4 |5       20| Q4          | 0 | / | 1 | 1 |
D5 |6   74  19| Q5          | 0 |!/ | X | - |
D6 |7  821  18| Q6          +---+---+---*---+
D7 |8       17| Q7
D8 |9       16| Q8
D9 |10      15| Q9
D10 |11      14| Q10
GND |12      13| CLK
+----------+
```

## 74822

10-bit 3-state inverting D flip-flop/bus driver.
```    +---+--+---+             +---+---+---*---+
/OE |1  +--+ 24| VCC         |/OE|CLK| D |/Q |
D1 |2       23| /Q1         +===+===+===*===+
D2 |3       22| /Q2         | 1 | X | X | Z |
D3 |4       21| /Q3         | 0 | / | 0 | 1 |
D4 |5       20| /Q4         | 0 | / | 1 | 0 |
D5 |6   74  19| /Q5         | 0 |!/ | X | - |
D6 |7  822  18| /Q6         +---+---+---*---+
D7 |8       17| /Q7
D8 |9       16| /Q8
D9 |10      15| /Q9
D10 |11      14| /Q10
GND |12      13| CLK
+----------+
```

## 74823

9-bit 3-state D flip-flop/bus driver with clock enable and reset.
```     +---+--+---+
/OE |1  +--+ 24| VCC
D1 |2       23| Q1
D2 |3       22| Q2
D3 |4       21| Q3
D4 |5       20| Q4
D5 |6   74  19| Q5
D6 |7  823  18| Q6
D7 |8       17| Q7
D8 |9       16| Q8
D9 |10      15| Q9
/RST |11      14| /CLKEN
GND |12      13| CLK
+----------+

```

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